SAPPHIRE WAFERS





Note: A-plane <1 1 2 0 >, R-plane <1 1 0 2>, and M-plane<1-100> are available customer's specification not listed above is also available upon request.





SOS (SI-ON-SAPPHIRE ) WAFERS





Silicon on sapphire (SOS) is a hetero-epitaxial process for integrated circuit manufacturing that consists of a thin layer (typically thinner than 0.6 µm) of silicon grown on a sapphire (Al2O3) wafer. The silicon is usually deposited by the decomposition of silane gas (SiH4) on heated sapphire substrates. The advantage of sapphire is that it is an excellent electrical insulator, preventing stray currents caused by radiation from spreading to nearby circuit elements.


BondaTek Sample SOS specifications:


Substrate material 99,996% high purity monocrystalline Al2O3

1.1 Orientation R-Plane (1-102)

1.2 Off-cut non off-cut +/-0.5 degree

1.3 Diameter 100+/- 0.1mm

1.4 Thickness 460 +/- 25 micron

1.5 Primary Flat 32.5 +/- 2.5mm 45 +/- 1 degree from C on R

1.6 Front Surface Finish Epi-ready polished (Ra <= 0,3nm)

1.7 Bow =20 micron

1.8 TTV =15 micron

1.9 Warp =20 micron

1.10 Flatness (TIR) =12 micron

1.11 Back surface finish as lapped (Ra = 0.6 +/-0.2um)

1.12 Laser Marking None

1.13 Packaging Atmosphere Argon (vacuum packed in class 100 clean room)

1.14 Additional notes: ·

For the metallic contamination, Ca, Na, K, Cr,Zn, Fe, Cu and Ni below 5E10 atoms/cm2 by VPD are acceptable.

For the LPD (light point defect) spec of < 40 at>0.2um is acceptable

·All parameters allow for a 3mm edge Exclusion


2. Epi Layer:

2.1 Epi Thickness 130nm +/- 5%

2.2 Doping Undoped

2.3 Sheet Resistance >100 ohm.cm